Copyright 1986-2021 Xilinx, Inc. All Rights Reserved.
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| Tool Version : Vivado v.2021.2 (lin64) Build 3367213 Tue Oct 19 02:47:39 MDT 2021
| Date         : Mon Apr 20 17:22:03 2026
| Host         : debian running 64-bit Debian GNU/Linux 13 (trixie)
| Command      : report_control_sets -verbose -file system_wrapper_control_sets_placed.rpt
| Design       : system_wrapper
| Device       : xc7z020
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Control Set Information

Table of Contents
-----------------
1. Summary
2. Histogram
3. Flip-Flop Distribution
4. Detailed Control Set Information

1. Summary
----------

+----------------------------------------------------------+-------+
|                          Status                          | Count |
+----------------------------------------------------------+-------+
| Total control sets                                       |   225 |
|    Minimum number of control sets                        |   225 |
|    Addition due to synthesis replication                 |     0 |
|    Addition due to physical synthesis replication        |     0 |
| Unused register locations in slices containing registers |   368 |
+----------------------------------------------------------+-------+
* Control sets can be merged at opt_design using control_set_merge or merge_equivalent_drivers
** Run report_qor_suggestions for automated merging and remapping suggestions


2. Histogram
------------

+--------------------+-------+
|       Fanout       | Count |
+--------------------+-------+
| Total control sets |   225 |
| >= 0 to < 4        |     1 |
| >= 4 to < 6        |    38 |
| >= 6 to < 8        |     7 |
| >= 8 to < 10       |    26 |
| >= 10 to < 12      |     0 |
| >= 12 to < 14      |     1 |
| >= 14 to < 16      |     0 |
| >= 16              |   152 |
+--------------------+-------+
* Control sets can be remapped at either synth_design or opt_design


3. Flip-Flop Distribution
-------------------------

+--------------+-----------------------+------------------------+-----------------+--------------+
| Clock Enable | Synchronous Set/Reset | Asynchronous Set/Reset | Total Registers | Total Slices |
+--------------+-----------------------+------------------------+-----------------+--------------+
| No           | No                    | No                     |            6232 |         1458 |
| No           | No                    | Yes                    |               0 |            0 |
| No           | Yes                   | No                     |            6686 |         1388 |
| Yes          | No                    | No                     |            1521 |          363 |
| Yes          | No                    | Yes                    |               0 |            0 |
| Yes          | Yes                   | No                     |            4529 |         1046 |
+--------------+-----------------------+------------------------+-----------------+--------------+


4. Detailed Control Set Information
-----------------------------------

+-------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------+----------------+--------------+
|          Clock Signal         |                                                                                   Enable Signal                                                                                   |                                                                                      Set/Reset Signal                                                                                      | Slice Load Count | Bel Load Count | Bels / Slice |
+-------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------+----------------+--------------+
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/reader_0/inst/fifo_0/xpm_fifo_base_inst/xpm_fifo_rst_inst/p_0_in                                                                                                                  |                1 |              3 |         3.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_3/U0/i_synth/decimator.decimation_filter/comb/sclr_count                                                                                                             | system_i/cic_3/U0/i_synth/reset                                                                                                                                                            |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_4/U0/i_synth/interpolator.interpolation_filter/ip_rate_cnt_en_reg_n_0                                                                                                | system_i/cic_4/U0/i_synth/interpolator.interpolation_filter/ip_rate_cnt[3]_i_1_n_0                                                                                                         |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_4/U0/i_synth/interpolator.interpolation_filter/comb/sclr_count                                                                                                       | system_i/cic_4/U0/i_synth/interpolator.interpolation_filter/sclr_int                                                                                                                       |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.gen_data_sym_addr[3]_i_1_n_0                                               |                                                                                                                                                                                            |                2 |              4 |         2.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/p_1_in                                                                                              | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.base_cnt[3]_i_1_n_0                                                                 |                2 |              4 |         2.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_0/U0/i_synth/decimator.decimation_filter/op_rate_en                                                                                                                  | system_i/cic_0/U0/i_synth/decimator.decimation_filter/op_rate_cnt[3]_i_1_n_0                                                                                                               |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/p_1_in                                                                                              | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.gen_data_addr[3]_i_1_n_0                                                            |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_0/U0/i_synth/decimator.decimation_filter/int/gen_stages[5].gen_unfolded.int_comb_stage/gen_nd_out_dly/gen_rtl.gen_dly.gen_regs.delay_bus_reg[1]_0                    | system_i/cic_0/U0/i_synth/decimator.decimation_filter/int/gen_stages[5].gen_unfolded.int_comb_stage/gen_nd_out_dly/SR[0]                                                                   |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_3/U0/i_synth/decimator.decimation_filter/op_rate_en                                                                                                                  | system_i/cic_3/U0/i_synth/decimator.decimation_filter/op_rate_cnt[3]_i_1_n_0                                                                                                               |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_7/U0/i_synth/interpolator.interpolation_filter/op_rate_max                                                                                                           | system_i/cic_7/U0/i_synth/interpolator.interpolation_filter/rate_cnt[3]_i_1_n_0                                                                                                            |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_3/U0/i_synth/decimator.decimation_filter/int/gen_stages[5].gen_unfolded.int_comb_stage/gen_nd_out_dly/gen_rtl.gen_dly.gen_regs.delay_bus_reg[1]_0                    | system_i/cic_3/U0/i_synth/decimator.decimation_filter/int/gen_stages[5].gen_unfolded.int_comb_stage/gen_nd_out_dly/SR[0]                                                                   |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_2/U0/i_synth/decimator.decimation_filter/op_rate_en                                                                                                                  | system_i/cic_2/U0/i_synth/decimator.decimation_filter/op_rate_cnt[3]_i_1_n_0                                                                                                               |                2 |              4 |         2.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_0/U0/i_synth/decimator.decimation_filter/comb/sclr_count                                                                                                             | system_i/cic_0/U0/i_synth/reset                                                                                                                                                            |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_1/U0/i_synth/decimator.decimation_filter/int/gen_stages[5].gen_unfolded.int_comb_stage/gen_nd_out_dly/gen_rtl.gen_dly.gen_regs.delay_bus_reg[1]_0                    | system_i/cic_1/U0/i_synth/decimator.decimation_filter/int/gen_stages[5].gen_unfolded.int_comb_stage/gen_nd_out_dly/SR[0]                                                                   |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_2/U0/i_synth/decimator.decimation_filter/comb/sclr_count                                                                                                             | system_i/cic_2/U0/i_synth/reset                                                                                                                                                            |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_2/U0/i_synth/decimator.decimation_filter/int/gen_stages[5].gen_unfolded.int_comb_stage/gen_nd_out_dly/gen_rtl.gen_dly.gen_regs.delay_bus_reg[1]_0                    | system_i/cic_2/U0/i_synth/decimator.decimation_filter/int/gen_stages[5].gen_unfolded.int_comb_stage/gen_nd_out_dly/SR[0]                                                                   |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_1/U0/i_synth/decimator.decimation_filter/op_rate_en                                                                                                                  | system_i/cic_1/U0/i_synth/decimator.decimation_filter/op_rate_cnt[3]_i_1_n_0                                                                                                               |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_1/U0/i_synth/decimator.decimation_filter/comb/sclr_count                                                                                                             | system_i/cic_1/U0/i_synth/reset                                                                                                                                                            |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_4/U0/i_synth/interpolator.interpolation_filter/op_rate_max                                                                                                           | system_i/cic_4/U0/i_synth/interpolator.interpolation_filter/rate_cnt[3]_i_1_n_0                                                                                                            |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_7/U0/i_synth/interpolator.interpolation_filter/ip_rate_cnt_en_reg_n_0                                                                                                | system_i/cic_7/U0/i_synth/interpolator.interpolation_filter/ip_rate_cnt[3]_i_1_n_0                                                                                                         |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/p_1_in                                                                                                    | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.gen_coef_addr[4]_i_1_n_0                                                                  |                2 |              4 |         2.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/p_1_in                                                                                                    | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.base_cnt[3]_i_1_n_0                                                                       |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_7/U0/i_synth/interpolator.interpolation_filter/comb/sclr_count                                                                                                       | system_i/cic_7/U0/i_synth/interpolator.interpolation_filter/sclr_int                                                                                                                       |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_3/buf_1/E[0]                                                                                                                                              | system_i/hub_0/inst/buf_3/buf_1/SR[0]                                                                                                                                                      |                2 |              4 |         2.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.i_cntrl_wrap_buff_re/Q[0]                                                        | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/sclr_int                                                                                                           |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_5/U0/i_synth/interpolator.interpolation_filter/comb/sclr_count                                                                                                       | system_i/cic_5/U0/i_synth/interpolator.interpolation_filter/sclr_int                                                                                                                       |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_6/U0/i_synth/interpolator.interpolation_filter/op_rate_max                                                                                                           | system_i/cic_6/U0/i_synth/interpolator.interpolation_filter/rate_cnt[3]_i_1_n_0                                                                                                            |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_4/int_rready_wire                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_1/int_data_reg_reg[27]_0                                                                                                                                     |                2 |              4 |         2.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_5/U0/i_synth/interpolator.interpolation_filter/ip_rate_cnt_en_reg_n_0                                                                                                | system_i/cic_5/U0/i_synth/interpolator.interpolation_filter/ip_rate_cnt[3]_i_1_n_0                                                                                                         |                2 |              4 |         2.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_5/U0/i_synth/interpolator.interpolation_filter/op_rate_max                                                                                                           | system_i/cic_5/U0/i_synth/interpolator.interpolation_filter/rate_cnt[3]_i_1_n_0                                                                                                            |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_6/U0/i_synth/interpolator.interpolation_filter/comb/sclr_count                                                                                                       | system_i/cic_6/U0/i_synth/interpolator.interpolation_filter/sclr_int                                                                                                                       |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_6/U0/i_synth/interpolator.interpolation_filter/ip_rate_cnt_en_reg_n_0                                                                                                | system_i/cic_6/U0/i_synth/interpolator.interpolation_filter/ip_rate_cnt[3]_i_1_n_0                                                                                                         |                1 |              4 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_latch_op_norm.i_sclr_pipe/sclr_pipe                                      | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/sclr_int                                                                                                     |                2 |              5 |         2.50 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.i_latch_op/sclr_pipe                                                             | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/sclr_int                                                                                                           |                2 |              5 |         2.50 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.blanking_cnt[4]_i_1_n_0                                                          | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/sclr_int                                                                                                           |                2 |              5 |         2.50 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/p_1_in                                                                                              | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.gen_coef_addr[4]_i_1_n_0                                                            |                2 |              5 |         2.50 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/rst_0/U0/EXT_LPF/lpf_int                                                                                                                                                          |                2 |              5 |         2.50 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.blanking_cnt[4]_i_1_n_0                                                    | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/sclr_int                                                                                                     |                2 |              5 |         2.50 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/p_1_in                                                                                                    | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.gen_data_addr[4]_i_1_n_0                                                                  |                2 |              6 |         3.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/rst_0/U0/SEQ/seq_cnt_en                                                                                                                                                  | system_i/rst_0/U0/SEQ/SEQ_COUNTER/q_int[5]_i_1_n_0                                                                                                                                         |                2 |              6 |         3.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/misc_1/inst/uart_pos[5]_i_2_n_0                                                                                                                                          | system_i/misc_1/inst/uart_pos[5]_i_1_n_0                                                                                                                                                   |                2 |              6 |         3.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/misc_1/inst/reflect_pos                                                                                                                                                  | system_i/misc_1/inst/reflect_pos[5]_i_1_n_0                                                                                                                                                |                2 |              6 |         3.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/misc_1/inst/pulse_counter13_out                                                                                                                                          | system_i/misc_1/inst/uart_prescaler[5]_i_1_n_0                                                                                                                                             |                3 |              6 |         2.00 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/writer_0/inst/fifo_0/xpm_fifo_base_inst/xpm_fifo_rst_inst/gen_rst_cc.fifo_wr_rst_cc_reg[2]_0                                                                                      |                3 |              6 |         2.00 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/writer_0/inst/fifo_0/xpm_fifo_base_inst/xpm_fifo_rst_inst/SR[0]                                                                                                                   |                2 |              7 |         3.50 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE038_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                1 |              8 |         8.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/misc_1/inst/int_misc_reg                                                                                                                                                 |                                                                                                                                                                                            |                3 |              8 |         2.67 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/int_data_reg_reg[33]_0                                                                                                                            | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                3 |              8 |         2.67 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE065_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                1 |              8 |         8.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE063_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                2 |              8 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE061_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                1 |              8 |         8.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE059_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                1 |              8 |         8.00 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                3 |              8 |         2.67 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE056_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                1 |              8 |         8.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE054_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                3 |              8 |         2.67 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE052_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                2 |              8 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE032_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                1 |              8 |         8.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE041_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                2 |              8 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE029_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                2 |              8 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE050_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                2 |              8 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE034_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                2 |              8 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE036_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                2 |              8 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE027_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                2 |              8 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE025_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                1 |              8 |         8.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE043_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                1 |              8 |         8.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE045_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                1 |              8 |         8.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE023_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                1 |              8 |         8.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE047_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                2 |              8 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE019_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                3 |              8 |         2.67 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE016_out                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                2 |              8 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_1/CE0                                                                                                                                               | system_i/hub_0/inst/buf_3/buf_0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N                                                                                                                        |                2 |              8 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_2/int_bready_wire                                                                                                                                         |                                                                                                                                                                                            |                2 |             12 |         6.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_paths[6].g_data_array.g_madd[5].g_wrap_buff.i_data_wrap_buff/i_mem_allign/E[0] | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_paths[6].g_data_array.g_madd[5].g_wrap_buff.i_data_wrap_buff/i_old_data_clred_dly/SR[0] |                6 |             16 |         2.67 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_paths[0].g_data_array.g_madd[5].g_wrap_buff.i_data_wrap_buff/i_mem_allign/E[0] | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_paths[0].g_data_array.g_madd[5].g_wrap_buff.i_data_wrap_buff/i_old_data_clred_dly/SR[0] |                4 |             16 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_paths[7].g_data_array.g_madd[5].g_wrap_buff.i_data_wrap_buff/i_mem_allign/E[0] | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_paths[7].g_data_array.g_madd[5].g_wrap_buff.i_data_wrap_buff/i_old_data_clred_dly/SR[0] |                4 |             16 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_paths[1].g_data_array.g_madd[5].g_wrap_buff.i_data_wrap_buff/i_mem_allign/E[0] | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_paths[1].g_data_array.g_madd[5].g_wrap_buff.i_data_wrap_buff/i_old_data_clred_dly/SR[0] |                4 |             16 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_paths[2].g_data_array.g_madd[5].g_wrap_buff.i_data_wrap_buff/i_mem_allign/E[0] | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_paths[2].g_data_array.g_madd[5].g_wrap_buff.i_data_wrap_buff/i_old_data_clred_dly/SR[0] |                4 |             16 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.i_cntrl_wrap_buff_re/RE                                                          | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.i_cntrl_wrap_buff_re/Q[0]                                                                 |                8 |             16 |         2.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_paths[3].g_data_array.g_madd[5].g_wrap_buff.i_data_wrap_buff/i_mem_allign/E[0] | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_paths[3].g_data_array.g_madd[5].g_wrap_buff.i_data_wrap_buff/i_old_data_clred_dly/SR[0] |                3 |             16 |         5.33 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_paths[4].g_data_array.g_madd[5].g_wrap_buff.i_data_wrap_buff/i_mem_allign/E[0] | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_paths[4].g_data_array.g_madd[5].g_wrap_buff.i_data_wrap_buff/i_old_data_clred_dly/SR[0] |                2 |             16 |         8.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_paths[5].g_data_array.g_madd[5].g_wrap_buff.i_data_wrap_buff/i_mem_allign/E[0] | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_paths[5].g_data_array.g_madd[5].g_wrap_buff.i_data_wrap_buff/i_old_data_clred_dly/SR[0] |                3 |             16 |         5.33 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_4/int_rready_wire                                                                                                                                         | system_i/hub_0/inst/buf_3/buf_1/int_data_reg_reg[24]_0                                                                                                                                     |                5 |             16 |         3.20 |
|  system_i/pll_0/inst/clk_out1 | system_i/reader_0/inst/buf_0/E[0]                                                                                                                                                 | system_i/reader_0/inst/buf_0/SR[0]                                                                                                                                                         |                5 |             17 |         3.40 |
|  system_i/pll_0/inst/clk_out1 | system_i/reader_0/inst/fifo_0/xpm_fifo_base_inst/rdp_inst/FSM_onehot_gen_fwft.curr_fwft_state_reg[3]                                                                              | system_i/reader_0/inst/fifo_0/xpm_fifo_base_inst/xpm_fifo_rst_inst/Q[0]                                                                                                                    |                7 |             17 |         2.43 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/reader_0/inst/fifo_0/xpm_fifo_base_inst/xpm_fifo_rst_inst/Q[0]                                                                                                                    |                7 |             18 |         2.57 |
|  system_i/pll_0/inst/clk_out1 | system_i/misc_0/inst/int_cntr_reg03_out                                                                                                                                           | system_i/misc_0/inst/int_cntr_reg[18]_i_1_n_0                                                                                                                                              |                6 |             19 |         3.17 |
|  system_i/pll_0/inst/clk_out1 | system_i/reader_0/inst/fifo_0/xpm_fifo_base_inst/xpm_fifo_rst_inst/ram_wr_en_i                                                                                                    | system_i/reader_0/inst/fifo_0/xpm_fifo_base_inst/xpm_fifo_rst_inst/Q[0]                                                                                                                    |                9 |             19 |         2.11 |
|  system_i/pll_0/inst/clk_out1 | system_i/writer_0/inst/fifo_0/xpm_fifo_base_inst/rst_d1_inst/ram_wr_en_i                                                                                                          | system_i/writer_0/inst/fifo_0/xpm_fifo_base_inst/xpm_fifo_rst_inst/gen_rst_cc.fifo_wr_rst_cc_reg[2]_0                                                                                      |                7 |             19 |         2.71 |
|  system_i/pll_0/inst/clk_out1 | system_i/reader_0/inst/buf_0/SR[0]                                                                                                                                                |                                                                                                                                                                                            |                4 |             19 |         4.75 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_1/buf_1/E[0]                                                                                                                                              |                                                                                                                                                                                            |                6 |             19 |         3.17 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_0/buf_0/int_ready_reg_reg_0                                                                                                                               |                                                                                                                                                                                            |                4 |             19 |         4.75 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/misc_0/inst/p_0_in                                                                                                                                                                |                4 |             20 |         5.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/writer_0/inst/fifo_0/xpm_fifo_base_inst/rdp_inst/ram_rd_en_i                                                                                                             | system_i/writer_0/inst/fifo_0/xpm_fifo_base_inst/xpm_fifo_rst_inst/gen_rst_cc.fifo_wr_rst_cc_reg[2]_0                                                                                      |                6 |             21 |         3.50 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_3/buf_1/int_ready_wire                                                                                                                                    |                                                                                                                                                                                            |                7 |             23 |         3.29 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_3/buf_0/int_ready_reg_reg_0                                                                                                                               |                                                                                                                                                                                            |                4 |             23 |         5.75 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/dac_0/inst/int_rst_reg[0]_i_1_n_0                                                                                                                                                 |                9 |             28 |         3.11 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/dds_0/U0/i_synth/sclr_i                                                                                                                                                           |                8 |             30 |         3.75 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/dds_1/U0/i_synth/sclr_i                                                                                                                                                           |                8 |             30 |         3.75 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_1/U0/i_synth/decimator.decimation_filter/rfd_int_reg_n_0                                                                                                             | system_i/cic_1/U0/i_synth/reset                                                                                                                                                            |                6 |             31 |         5.17 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_4/int_rready_wire                                                                                                                                         |                                                                                                                                                                                            |               10 |             31 |         3.10 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_0/U0/i_synth/decimator.decimation_filter/rfd_int_reg_n_0                                                                                                             | system_i/cic_0/U0/i_synth/reset                                                                                                                                                            |                5 |             31 |         6.20 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_3/U0/i_synth/decimator.decimation_filter/rfd_int_reg_n_0                                                                                                             | system_i/cic_3/U0/i_synth/reset                                                                                                                                                            |                6 |             31 |         5.17 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_2/U0/i_synth/decimator.decimation_filter/rfd_int_reg_n_0                                                                                                             | system_i/cic_2/U0/i_synth/reset                                                                                                                                                            |                8 |             31 |         3.88 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_0/U0/i_synth/decimator.decimation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_nd_out_dly/E[0]                                                            | system_i/cic_0/U0/i_synth/reset                                                                                                                                                            |                7 |             32 |         4.57 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_7/U0/i_synth/interpolator.interpolation_filter/data_in_reg0                                                                                                          | system_i/cic_7/U0/i_synth/reset                                                                                                                                                            |                7 |             32 |         4.57 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_7/U0/i_synth/interpolator.interpolation_filter/int/gen_stages[5].gen_unfolded.int_comb_stage/gen_nd_out_dly/E[0]                                                     | system_i/cic_7/U0/i_synth/interpolator.interpolation_filter/RDY0                                                                                                                           |                7 |             32 |         4.57 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_3/U0/i_synth/decimator.decimation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_nd_out_dly/E[0]                                                            | system_i/cic_3/U0/i_synth/reset                                                                                                                                                            |                5 |             32 |         6.40 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_4/U0/i_synth/interpolator.interpolation_filter/data_in_reg0                                                                                                          | system_i/cic_4/U0/i_synth/reset                                                                                                                                                            |               10 |             32 |         3.20 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_5/U0/i_synth/interpolator.interpolation_filter/int/gen_stages[5].gen_unfolded.int_comb_stage/gen_nd_out_dly/E[0]                                                     | system_i/cic_5/U0/i_synth/interpolator.interpolation_filter/RDY0                                                                                                                           |                6 |             32 |         5.33 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_5/U0/i_synth/interpolator.interpolation_filter/data_in_reg0                                                                                                          | system_i/cic_5/U0/i_synth/reset                                                                                                                                                            |                8 |             32 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_1/U0/i_synth/decimator.decimation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_nd_out_dly/E[0]                                                            | system_i/cic_1/U0/i_synth/reset                                                                                                                                                            |                6 |             32 |         5.33 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_4/U0/i_synth/interpolator.interpolation_filter/int/gen_stages[5].gen_unfolded.int_comb_stage/gen_nd_out_dly/E[0]                                                     | system_i/cic_4/U0/i_synth/interpolator.interpolation_filter/RDY0                                                                                                                           |                5 |             32 |         6.40 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_6/U0/i_synth/interpolator.interpolation_filter/int/gen_stages[5].gen_unfolded.int_comb_stage/gen_nd_out_dly/E[0]                                                     | system_i/cic_6/U0/i_synth/interpolator.interpolation_filter/RDY0                                                                                                                           |               10 |             32 |         3.20 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_6/U0/i_synth/interpolator.interpolation_filter/data_in_reg0                                                                                                          | system_i/cic_6/U0/i_synth/reset                                                                                                                                                            |                8 |             32 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_2/U0/i_synth/decimator.decimation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_nd_out_dly/E[0]                                                            | system_i/cic_2/U0/i_synth/reset                                                                                                                                                            |                6 |             32 |         5.33 |
|  system_i/pll_0/inst/clk_out1 | system_i/reader_0/inst/buf_0/int_arready_wire                                                                                                                                     |                                                                                                                                                                                            |               10 |             33 |         3.30 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_1/buf_0/int_ready_reg_reg_0                                                                                                                               |                                                                                                                                                                                            |                6 |             37 |         6.17 |
|  system_i/pll_0/inst/clk_out1 | system_i/hub_0/inst/buf_1/buf_1/int_ready_wire                                                                                                                                    |                                                                                                                                                                                            |               10 |             37 |         3.70 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_4/U0/i_synth/interpolator.interpolation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/en_dly                    |                                                                                                                                                                                            |                5 |             37 |         7.40 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_4/U0/i_synth/interpolator.interpolation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/en_dly                    | system_i/cic_4/U0/i_synth/interpolator.interpolation_filter/sclr_int                                                                                                                       |               17 |             37 |         2.18 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_4/U0/i_synth/interpolator.interpolation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/E[0]                      | system_i/cic_4/U0/i_synth/interpolator.interpolation_filter/sclr_int                                                                                                                       |                5 |             37 |         7.40 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_7/U0/i_synth/interpolator.interpolation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/en_dly                    |                                                                                                                                                                                            |                5 |             37 |         7.40 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_7/U0/i_synth/interpolator.interpolation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/E[0]                      | system_i/cic_7/U0/i_synth/interpolator.interpolation_filter/sclr_int                                                                                                                       |                5 |             37 |         7.40 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_6/U0/i_synth/interpolator.interpolation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/E[0]                      | system_i/cic_6/U0/i_synth/interpolator.interpolation_filter/sclr_int                                                                                                                       |                5 |             37 |         7.40 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_7/U0/i_synth/interpolator.interpolation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/en_dly                    | system_i/cic_7/U0/i_synth/interpolator.interpolation_filter/sclr_int                                                                                                                       |               16 |             37 |         2.31 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_5/U0/i_synth/interpolator.interpolation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/en_dly                    |                                                                                                                                                                                            |                5 |             37 |         7.40 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_5/U0/i_synth/interpolator.interpolation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/en_dly                    | system_i/cic_5/U0/i_synth/interpolator.interpolation_filter/sclr_int                                                                                                                       |               13 |             37 |         2.85 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_6/U0/i_synth/interpolator.interpolation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/en_dly                    | system_i/cic_6/U0/i_synth/interpolator.interpolation_filter/sclr_int                                                                                                                       |               20 |             37 |         1.85 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_6/U0/i_synth/interpolator.interpolation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/en_dly                    |                                                                                                                                                                                            |                5 |             37 |         7.40 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_5/U0/i_synth/interpolator.interpolation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/E[0]                      | system_i/cic_5/U0/i_synth/interpolator.interpolation_filter/sclr_int                                                                                                                       |                5 |             37 |         7.40 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_0/U0/i_synth/decimator.decimation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/E[0]                            | system_i/cic_0/U0/i_synth/reset                                                                                                                                                            |                5 |             39 |         7.80 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_2/U0/i_synth/decimator.decimation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/E[0]                            | system_i/cic_2/U0/i_synth/reset                                                                                                                                                            |                5 |             39 |         7.80 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_2/U0/i_synth/decimator.decimation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/en_dly                          | system_i/cic_2/U0/i_synth/reset                                                                                                                                                            |               16 |             39 |         2.44 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_2/U0/i_synth/decimator.decimation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/en_dly                          |                                                                                                                                                                                            |                5 |             39 |         7.80 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_1/U0/i_synth/decimator.decimation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/E[0]                            | system_i/cic_1/U0/i_synth/reset                                                                                                                                                            |                5 |             39 |         7.80 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_1/U0/i_synth/decimator.decimation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/en_dly                          | system_i/cic_1/U0/i_synth/reset                                                                                                                                                            |               14 |             39 |         2.79 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_1/U0/i_synth/decimator.decimation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/en_dly                          |                                                                                                                                                                                            |                5 |             39 |         7.80 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_0/U0/i_synth/decimator.decimation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/en_dly                          | system_i/cic_0/U0/i_synth/reset                                                                                                                                                            |               17 |             39 |         2.29 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_0/U0/i_synth/decimator.decimation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/en_dly                          |                                                                                                                                                                                            |                5 |             39 |         7.80 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_3/U0/i_synth/decimator.decimation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/en_dly                          |                                                                                                                                                                                            |                5 |             39 |         7.80 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_3/U0/i_synth/decimator.decimation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/en_dly                          | system_i/cic_3/U0/i_synth/reset                                                                                                                                                            |               16 |             39 |         2.44 |
|  system_i/pll_0/inst/clk_out1 | system_i/cic_3/U0/i_synth/decimator.decimation_filter/comb/gen_stages[0].gen_folded.int_comb_stage/gen_split_accum[0].gen_comb_mem_src.gen_en_dly/E[0]                            | system_i/cic_3/U0/i_synth/reset                                                                                                                                                            |                5 |             39 |         7.80 |
|  system_i/pll_0/inst/clk_out1 | system_i/misc_1/inst/pulse_counter                                                                                                                                                | system_i/misc_1/inst/p_0_in0                                                                                                                                                               |               11 |             40 |         3.64 |
|  system_i/pll_0/inst/clk_out1 | system_i/misc_1/inst/reflect_buffer_0                                                                                                                                             |                                                                                                                                                                                            |               12 |             40 |         3.33 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/cic_5/U0/i_synth/reset                                                                                                                                                            |                8 |             41 |         5.12 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/cic_4/U0/i_synth/reset                                                                                                                                                            |               10 |             41 |         4.10 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/cic_6/U0/i_synth/reset                                                                                                                                                            |               10 |             41 |         4.10 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/cic_7/U0/i_synth/reset                                                                                                                                                            |               11 |             41 |         3.73 |
|  system_i/pll_0/inst/clk_out1 | system_i/misc_1/inst/uart_buffer[51]_i_1_n_0                                                                                                                                      | system_i/misc_1/inst/p_0_in0                                                                                                                                                               |               11 |             44 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/lfsr_0/inst/m_axis_tvalid                                                                                                                                                | system_i/lfsr_0/inst/p_0_in                                                                                                                                                                |               10 |             63 |         6.30 |
|  system_i/pll_0/inst/clk_out1 | system_i/lfsr_1/inst/m_axis_tvalid                                                                                                                                                | system_i/lfsr_1/inst/p_0_in                                                                                                                                                                |               10 |             63 |         6.30 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.i_cntrl_wrap_buff_re/Q[0]                                                                 |               26 |             73 |         2.81 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl_srl_clear.i_cntrl_blank_mem/SCLR_A                                          |               16 |             96 |         6.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.i_latch_op/E[0]                                                                  | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.i_latch_op/SR[0]                                                                          |               22 |             96 |         4.36 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[5].cntrl_data_sym_reg_n_0_[5][8]                                   | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[5].cntrl_data_sym_reg_n_0_[5][0]                                            |               18 |             96 |         5.33 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[5].cntrl_data_sym_reg_n_0_[5][8]                                   |                                                                                                                                                                                            |               21 |             96 |         4.57 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[5].cntrl_data_sym_reg_n_0_[5][7]                                   |                                                                                                                                                                                            |               16 |             96 |         6.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[5].cntrl_data_reg_n_0_[5][3]                                       |                                                                                                                                                                                            |               16 |             96 |         6.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[4].cntrl_data_sym_reg_n_0_[4][7]                                   |                                                                                                                                                                                            |               16 |             96 |         6.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[4].cntrl_data_sym_reg_n_0_[4][6]                                   | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[4].cntrl_data_sym_reg_n_0_[4][1]                                            |               18 |             96 |         5.33 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[4].cntrl_data_reg_n_0_[4][5]                                       |                                                                                                                                                                                            |               23 |             96 |         4.17 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[4].cntrl_data_reg_n_0_[4][5]                                       | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[4].cntrl_data_reg_n_0_[4][2]                                                |               19 |             96 |         5.05 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.i_cntrl_cntrl_mem_we/WEA                                                   |                                                                                                                                                                                            |               16 |             96 |         6.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl_signals[5].g_others.i_delay_cntrl_data/D[0]                        |                                                                                                                                                                                            |               24 |             96 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl_signals[5].g_others.i_delay_cntrl_data/D[0]                        | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl_signals[2].g_others.i_delay_cntrl_data/D[0]                                 |               21 |             96 |         4.57 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl_signals[7].g_others.i_delay_cntrl_data/D[0]                        |                                                                                                                                                                                            |               16 |             96 |         6.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl_signals[6].g_others.i_delay_cntrl_data/D[0]                        | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/flush_sym_data                                                                                               |               20 |             96 |         4.80 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[1].cntrl_data_reg_n_0_[1][3]                                       |                                                                                                                                                                                            |               16 |             96 |         6.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[1].cntrl_data_reg_n_0_[1][5]                                       |                                                                                                                                                                                            |               20 |             96 |         4.80 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[1].cntrl_data_reg_n_0_[1][5]                                       | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[1].cntrl_data_reg_n_0_[1][2]                                                |               21 |             96 |         4.57 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[1].cntrl_data_sym_reg_n_0_[1][6]                                   | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[1].cntrl_data_sym_reg_n_0_[1][1]                                            |               18 |             96 |         5.33 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[1].cntrl_data_sym_reg_n_0_[1][7]                                   |                                                                                                                                                                                            |               16 |             96 |         6.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[2].cntrl_data_reg_n_0_[2][5]                                       |                                                                                                                                                                                            |               17 |             96 |         5.65 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[2].cntrl_data_reg_n_0_[2][3]                                       |                                                                                                                                                                                            |               16 |             96 |         6.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[4].cntrl_data_reg_n_0_[4][3]                                       |                                                                                                                                                                                            |               16 |             96 |         6.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[3].cntrl_data_sym_reg_n_0_[3][7]                                   |                                                                                                                                                                                            |               16 |             96 |         6.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[3].cntrl_data_sym_reg_n_0_[3][6]                                   | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[3].cntrl_data_sym_reg_n_0_[3][1]                                            |               17 |             96 |         5.65 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[3].cntrl_data_reg_n_0_[3][5]                                       | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[3].cntrl_data_reg_n_0_[3][2]                                                |               17 |             96 |         5.65 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[3].cntrl_data_reg_n_0_[3][5]                                       |                                                                                                                                                                                            |               23 |             96 |         4.17 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[3].cntrl_data_reg_n_0_[3][3]                                       |                                                                                                                                                                                            |               16 |             96 |         6.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[2].cntrl_data_sym_reg_n_0_[2][7]                                   |                                                                                                                                                                                            |               16 |             96 |         6.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[2].cntrl_data_sym_reg_n_0_[2][6]                                   | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[2].cntrl_data_sym_reg_n_0_[2][1]                                            |               17 |             96 |         5.65 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[2].cntrl_data_reg_n_0_[2][5]                                       | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_cntrl[2].cntrl_data_reg_n_0_[2][2]                                                |               17 |             96 |         5.65 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[2]_28[7]                                                                                            |                                                                                                                                                                                            |               33 |            128 |         3.88 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[2]_28[6]                                                                                            | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[2]_28[1]                                                                                                     |               27 |            128 |         4.74 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[2]_28[6]                                                                                            |                                                                                                                                                                                            |               30 |            128 |         4.27 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[2]_28[5]                                                                                            | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[2]_28[2]                                                                                                     |               28 |            128 |         4.57 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[2]_28[3]                                                                                            |                                                                                                                                                                                            |               34 |            128 |         3.76 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[1]_27[7]                                                                                            |                                                                                                                                                                                            |               34 |            128 |         3.76 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[3]_29[7]                                                                                            |                                                                                                                                                                                            |               36 |            128 |         3.56 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[1]_27[6]                                                                                            | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[1]_27[1]                                                                                                     |               30 |            128 |         4.27 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[1]_27[6]                                                                                            |                                                                                                                                                                                            |               26 |            128 |         4.92 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[1]_27[5]                                                                                            | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[1]_27[2]                                                                                                     |               27 |            128 |         4.74 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[1]_27[3]                                                                                            |                                                                                                                                                                                            |               35 |            128 |         3.66 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_cntrl_signals[6].g_others.i_delay/D[0]                                         | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/flush_data                                                                                                         |               28 |            128 |         4.57 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_cntrl_signals[6].g_others.i_delay/D[0]                                         |                                                                                                                                                                                            |               30 |            128 |         4.27 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_cntrl_signals[7].g_others.i_delay/D[0]                                         |                                                                                                                                                                                            |               32 |            128 |         4.00 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_cntrl_signals[4].g_others.i_delay/D[0]                                         | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_cntrl_signals[2].g_others.i_delay/D[0]                                                  |               34 |            128 |         3.76 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.i_cntrl_cntrl_mem_we/WEA                                                         |                                                                                                                                                                                            |               34 |            128 |         3.76 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[3]_29[5]                                                                                            | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[3]_29[2]                                                                                                     |               24 |            128 |         5.33 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_latch_op_norm.i_latch_op/E[0]                                            | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/g_semi_parallel_and_smac.g_latch_op_norm.i_sclr_pipe/SR[0]                                                   |               36 |            128 |         3.56 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[5]_1[7]                                                                                             |                                                                                                                                                                                            |               36 |            128 |         3.56 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[5]_1[3]                                                                                             |                                                                                                                                                                                            |               37 |            128 |         3.46 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[4]_30[7]                                                                                            |                                                                                                                                                                                            |               35 |            128 |         3.66 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[4]_30[6]                                                                                            | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[4]_30[1]                                                                                                     |               25 |            128 |         5.12 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[4]_30[6]                                                                                            |                                                                                                                                                                                            |               33 |            128 |         3.88 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[4]_30[5]                                                                                            | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[4]_30[2]                                                                                                     |               30 |            128 |         4.27 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[4]_30[3]                                                                                            |                                                                                                                                                                                            |               34 |            128 |         3.76 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[3]_29[3]                                                                                            |                                                                                                                                                                                            |               36 |            128 |         3.56 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[3]_29[6]                                                                                            |                                                                                                                                                                                            |               36 |            128 |         3.56 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[3]_29[6]                                                                                            | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/cntrl[3]_29[1]                                                                                                     |               29 |            128 |         4.41 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.g_cntrl_srl_clear.i_cntrl_blank_mem/SCLR_A                                                |               34 |            128 |         3.76 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/fir_1/U0/i_synth/g_polyphase_interpolation.i_polyphase_interpolation/sclr_int                                                                                                     |               45 |            142 |         3.16 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/sclr_int                                                                                                           |               64 |            172 |         2.69 |
|  system_i/pll_0/inst/clk_out1 | system_i/fir_0/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_semi_parallel_and_smac.i_cntrl_wrap_buff_we/WE                                                          |                                                                                                                                                                                            |               32 |            256 |         8.00 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/cic_5/U0/i_synth/interpolator.interpolation_filter/sclr_int                                                                                                                       |              153 |            717 |         4.69 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/cic_7/U0/i_synth/interpolator.interpolation_filter/sclr_int                                                                                                                       |              125 |            717 |         5.74 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/cic_6/U0/i_synth/interpolator.interpolation_filter/sclr_int                                                                                                                       |              158 |            717 |         4.54 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/cic_4/U0/i_synth/interpolator.interpolation_filter/sclr_int                                                                                                                       |              140 |            717 |         5.12 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/cic_3/U0/i_synth/reset                                                                                                                                                            |              126 |            722 |         5.73 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/cic_2/U0/i_synth/reset                                                                                                                                                            |              142 |            722 |         5.08 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/cic_1/U0/i_synth/reset                                                                                                                                                            |              126 |            722 |         5.73 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   | system_i/cic_0/U0/i_synth/reset                                                                                                                                                            |              147 |            722 |         4.91 |
|  system_i/pll_0/inst/clk_out1 |                                                                                                                                                                                   |                                                                                                                                                                                            |             1464 |           6419 |         4.38 |
+-------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------+----------------+--------------+


